Glossary of Terms

This subpage is under construction.

Please raise an issue if there's any term you feel is missing here!

Boot ROM

The 16 KiB of mask ROM in the Propeller 2. This is not directly accessible, but when the chip starts up, it is copied into the last 16K of Hub RAM.

This contains:

TODO: further information on boot methods and built-in code.

Catalina

Catalina is an ANSI C compiler (and much more) for the Propeller 1 and 2 by Ross Higson. It features limited self-hosting capability on the Propeller 2.

Check it out at its Forum thread.

Cog

Cogs are the independent parallel processing units of the Propeller chips.

Each Propeller 2 cog, of which there are eight, contains:

Each cog is independent from the others. It's execution can only be disturbed by the special-purpose COGSTOP and COGBRK instructions or conflicts over shared resources such as Hub RAM or I/O Pins.
The Cog CPU's timing is fully deterministic and suitable for implementing hard real-time systems.

Cog RAM

Cog RAM (also sometimes referred to as "register RAM") is the main local memory area in each Cog. It is addressed as 512 x 32-bit longwords. The last 8 locations are used as I/O registers and another 8 are used as special-purpose locations (Interrupt vectors and returns, etc), leaving 496 regular Cog RAM locations.

Cog RAM locations can be used directly as D/S operands for instructions. Code can also be stored in Cog RAM.

COGEXEC

A Cog is in COGEXEC mode when it is executing code from Cog RAM or LUT RAM, as opposed to HUBEXEC. This is generally the faster and more flexible execution mode, but code size is limited.

A Cog can freely switch between COGEXEC and HUBEXEC using regular branch instructions.

Colorspace Converter

The colorspace converter is a hardware unit in each Cog that is designed to encode raw RGB data from the Streamer into various common video formats, including VGA, NTSC/PAL composite video, YPbPr, HDMI and more.

See also: CSC documentation

FastSpin

Historical name of FlexSpin before version 5.0.0

FCACHE

FCACHE is a technique employed by high-level language compilers (notably FlexSpin) to combine the benefits of COGEXEC and HUBEXEC/LMM modes by dynamically copying code loops from Hub RAM to Cog RAM for faster execution.

FIFO

TODO

See also: FIFO documentation

FlexSpin

FlexSpin is a Spin1/Spin2/C/BASIC multi-language compiler by Eric Smith for Propeller 1 and 2. It features a best-in-class optimizing PASM backend, multi-language interactions (e.g. call Spin code from C and vice versa) and many useful language extensions.

Check out the forum thread and GitHub.

(It shares most of it's codebase with spin2cpp, which came first, so that's what the Git repo is called)

FlexC

The C dialect used by FlexSpin is sometimes called "FlexC". There also exists a flexcc alternative frontend to the compiler that attempts to be more CLI-compatible with other C compilers. But all frontends accept all languages.

FlexProp

FlexProp is the official GUI IDE for FlexSpin. However, you can also use the compiler as a standalone CLI tool.

Check out the forum thread and GitHub.

Hub

The Hub refers to all the resources that are shared between all cogs.

The Propeller 2's Hub contains: - 512 KiB of Hub RAM - 16 lock bits - a 64-bit global cycle counter - a free-running PRNG (see: GETRND) - The clock/PLL unit

(The Smart Pins are generally not consided part of the Hub, even though they are shared as well).

Generally when referring to doing something "in Hub", the Hub RAM is what's being referred to.

Hub RAM

Hub RAM is the large memory that is shared between all cogs. On the Propeller 2, there are 512KiB of Hub RAM, of which the last 16KiB are used as Boot ROM or for the debugger. If neither of these is needed, the full 512KiB can be used by user code.

Unlike Cog RAM and LUT RAM, Hub RAM is addressed as 8-bit bytes. On the Propeller 2, unaligned read/write is fully supported.

HUBEXEC

A Cog is in HUBEXEC mode when it is executing code from Hub RAM, as opposed to COGEXEC. This mode allows larger code size, but disables certain features (most notably the FIFO) and branches execute very slowly.

A Cog can freely switch between COGEXEC and HUBEXEC using regular branch instructions.

loadp2

loadp2 is a command line tool for loading and flashing P2 code. TODO

The most updated version can be found on totalspectrum GitHub.

LUT

LUT is short for "Look-up Table". On the Propeller 2, each Cog has a block of "LUT RAM". This memory is organized as 512 x 32 bit longwords, similar to Cog RAM.

LUT RAM can be used in multiple ways:

LMM

LMM means "Large Memory Model". This is a technique used on the Propeller 1 to achieve something similar to HUBEXEC (which does not exist on the P1). On the P2 native HUBEXEC is available and the memory model is always "large".

OBEX

OBEX stands for "Object Exchange" and refers to a code sharing platform operated by Parallax.

Current OBEX
Previous Git-OBEX
Ancient OBEX

P2 / P1

Shorthand abbreviations for the Propeller 2 and the original Propeller chip.

P2D2

Early P2 board by Peter Jakacki. No longer in production.

TODO: maybe put a picure

P2docs

This very webpage (currently hosted at p2docs.github.io) that you are reading right now. It is written and maintained by community member Wuerfel_21 and placed under the watchful guard of the bootleg Reimu plushie.

P2docs is open to your contributions on GitHub! Feel free to raise issues or contribute content!
(Imagine here, a standard-issue disclaimer here about how GitHub is owned by the generally odious, nasty and dispicable MicroSoft and our usage of the GitHub service is not an endorsement thereof)

P2 EDGE

Also known by it's part number "P2EC", the P2 EDGE is a small Propeller 2 board, exposing the I/O pins on its namesake card edge connector.

TODO: maybe put a picure

P2 EVAL

The original Propeller 2 evaluation board. Though now discontinued, it remains popular as a development board.

Rare early versions may contain a buggy/incomplete Rev.A P2 chip.

TODO: maybe put a picure and more text

P2Hot

Retronym for an early Propeller 2 design that was ultimately scrapped due to having unacceptably high power draw and heat dissapation. This was around April 2014, so any Propeller 2 discussions prior to that most likely refer to this scrapped design.

Approximately no one calls the actual Propeller 2 "P2Cool", though it is very (figuratively) cool.

P2STAMP

TODO

P2SwAP

TODO

PNut

PNut is the official Spin2 reference compiler and assembler by Chip Gracey.

Check it out at its Forum thread.

Propeller 1

Retronym for the first Propeller chip from 2006. It is not directly compatible with the Propeller 2, but many of it's design principles have been carried over. It is still produced and well-supported. You can find it's excellent manual re-hosted here.

Propeller 2

The Propeller 2 chip from Parallax. This whole page is dedicated to documenting it's oddball architecture. TODO

There exist 3 revisions of the Propeller 2 chip:

Propeller Tool

TODO: URL

PSRAM

PSRAM stands for "Pseudo-Static RAM", a type of DRAM that contains self-refresh circuitry.

There exists a version of the P2 EDGE featuring 4 APMemory QPI PSRAM chips. Other Propeller 2 boards are also equipped with these chips. "PSRAM" usally refers to these QPI parts specifically.

HyperRAM

HyperRAM is another type of PSRAM found on some Propeller 2 boards.

Silicon Doc

The "Silicon Doc" is the official Propeller 2 Hardware documentation by Chip Gracey. It is considered to be rather heavy literature.

Read our mirror or the originals.

Smart Pin

TODO

Spin

TODO

Spin 1

TODO

Spin 2

TODO

Spin Tools

Spin Tools is a Spin IDE developed by Marco Maccaferri. It is roughly mimics the design and operation of Propeller Tool

Check it out at its Forum thread and GitHub.

spin2cpp

TODO: URL

Streamer

TODO

See also: Streamer documentation

TAQOZ

TAQOZ is a FORTH interpreter by Peter Jakacki that has been included into the Boot ROM.

TODO: Link to TAQOZ docs.

XBYTE

XBYTE is a feature of the Propeller 2 that enables hardware-accelerated bytecode interpreters.

See also: XBYTE documentation